A multiprocessor system is a data processing system in which a number of processors cooperate to execute the total overall task of the system. It is used when one processor cannot handle the full data processing load demanded of the system. While a great deal of progress has been made in solving the problems of multiprocessor systems having a small number of processors, no satisfactory arrangement exists for the achievement of a very high throughput in a system having a large number of modest performance processors.
Multiprocessor systems, in common with other data processing systems, use random access storage such as semiconductor random access memories, and bulk storage, such as magnetic disks or tapes. When a particular task is being performed by the system, the program and data associated with this task is stored in random access memory so that the data can be processed. At other times, the data is stored in bulk storage, ready to be transferred or paged into random access storage when the need arises.
No really satisfactory technique exists in prior art systems for efficiently and economically sharing random access memory, especially that containing programs, among many processors. Some prior art systems share all random access memory, including programs and data, among all processors. When program memory is to be fully shared among all processors, a bottleneck exists in accessing and communicating program instructions from common memory to each of the processors upon demand. Either an extremely high throughput bus or a complex bus interconnection scheme is used to transmit the instructions from the memory to several processors. Such prior art buses are expensive and the systems are limited to a small number of processors since they require the sending of vast quantities of program instructions over the buses with an inevitable loss of performance capability.
In other prior art systems, local random access memory is provided for each processor. Multiprocessor systems generally operate in the multiprocessing mode, wherein the system executes a number of broad tasks, called program processes, simultaneously. Associated with each program process are a number of variables and parameters, stored in an area of memory called the program function context. Each of these program processes accomplishes its objectives by executing a number of sub-tasks or program functions which utilize the data of the associated program function context. In prior art multiprocessing systems, a program process is usually confined to a single procesor. Placing an entire program process on one processor requires an expensive, large local memory for that processor and degrades performance by requiring a great deal of manipulation of memory contents. The alternative of breaking large processes down into small processes is also inefficient and leads to an unwieldy software structure.
Prior art multiprocessor systems use restricted and specialized communication means between processors and input/output controllers and among input/output controllers in order to avoid overloading the common system bus. Input/output controllers are associated with various combinations of devices such as magnetic disk or tape memories, input/output terminals and displays, high speed printers, punched card readers and punchers. Usually, these controllers are interconnected by arrangements with limited access; all processors cannot directly access all input/output units without considerable expense. This means that system performance is degraded if large amounts of data must be exchanged between two input/output controllers which were initially designed to exchange very little data.
Many modern processors and multiprocessor systems use a highly flexible method of addressing memory called virtual addressing. A virtual address is an address of main (random access) memory in a simulated processor system; the virtual address is translated into a physical address in the actual processor system before it is used to access random access memory. The translation mechanism is flexible so that at different times, a given virtual address may correspond to different physical addresses of random access memory; a virtual address may also correspond to an address of bulk storage. Virtual addresses tend to be fixed in a program; physical addresses are assigned to a given segment of virtual addresses when needed. A page fault occurs when a virtual address does not correspond to a physical address of random access memory, i.e., when the translation mechanism fails to find such a correspondence. Page faults always require the adjustment of the translation mechanism, and sometimes, the paging of data from bulk storage into newly assigned random access memory space.
The design of economical address translation mechanisms for translating virtual addresses to physical addresses presents a problem in a multiprocessor system. In prior art multiprocessor systems, these mechanisms are implemented using very fast circuits because the delay of address translation is added to each access of random access memory. The size of address translation mechanisms is usually restricted by cost because of the high speed requirement. A result is that many page faults, i.e., system indications that a desired memory location cannot be accessed, occur because, although the required segment is available in storage, the translation to reach that location is not currently in the address translation mechanism. In prior art multiprocessor systems with many individual processors and address translator mechanisms, address translation is expensive and tends to limit system performance. Furthermore, prior art bus schemes interconnecting the processors and shared memories of a multiprocessing system are frequently a limitation on the total throughput.